Get2Chip, Plato, Silicon Perspective, Verplex Kick-off Emerging Technology Seminar Series
Attendees Will Learn Multi-Million Gate Design Techniques Using Next-Generation EDA Software
SAN JOSE, Calif.--(BUSINESS WIRE)--April 8, 2002--
An emerging technology seminar series titled, "Multi-Million Gate
Chip: Mission Impossible? Think Again!" that outlines benefits of
using a high-performance environment for complex system-on-chip (SOC)
design, gets under way Thursday, April 18, here at the Doubletree
Hotel.
Seminars, sponsored by Get2Chip, Inc., Verplex Systems Inc., and
Plato Design Systems and Silicon Perspective, a company of Cadence
Design Systems, Inc. (NYSE: CDN - news), conclude May 2 in Boston, after
stops in San Diego, Denver and Austin. Intended for electrical
engineers working on high-performance designs, the seminar series will
illustrate how to accelerate the design process, while achieving
high-quality, high-speed designs using a suite of next-generation
Electronic Design Automation (EDA) software.
Seminars are presented free of charge to qualifying integrated
circuit (IC) design engineers or engineering managers who register at:
http://www.bigchipdesign.com.
Dates and locations are:
Thursday, April 18, San Jose -- Doubletree Hotel, San Jose
Tuesday, April 23, San Diego -- Hyatt Regency Hotel La Jolla
Thursday, April 25, Denver -- Omni Interlocken Hotel
Tuesday, April 30, Austin -- Intercontinental Hotel Stephen F.
Austin
Thursday, May 2, Boston -- Burlington Marriott Hotel
To learn more about the seminar series or participating companies,
visit: http://www.bigchipdesign.com.
Contact:
Public Relations for Get2Chip
Nanette Collins, 617/437-1822
nanette@nvc.com
